For a digital signal, a conductor exhibits transmission line effects such as reflections when the length of the conductor is at least 1/6 the distance that a rising/falling edge occupies when propagating. You need to mitigate and control reflections in a digital transmission line, and you can do this by implementing what is called termination.

There are two main types of termination, source (driver) termination and load (receiver) termination. Source termination stops waves travelling at the source from reflecting back at the receiver by adding a series resistor that when added to the source resistance equals the characteristic impedance of the transmission line.

#### Source Termination: Add series resistor at driver. Value R_{T} = Z_{0} – R_{S}. If R_{S} is small, then R_{T} = Z_{0}

#### Load Termination: Add parallel resistor at receiver. Value such that R_{L} // R_{T} = Z_{0}. If R_{L} is large, then R_{T} = Z_{0}

Load termination involves placing a resistor in parallel (between signal and ground) with value such that the parallel combination of the termination resistor and load resistance equals the characteristic impedance of the transmission line. If the load resistance is relatively high, which it is for most digital circuits, then R_{T} = Z_{0}.

## Source Termination in Detail

Let’s talk through a source termination example in more detail. Assume that you know the source resistance of your driver is 30 Ohms, you are driving a transmission line with 50 Ohms characteristic impedance, and you want to implement source termination. To do so, just add a series resistor at the source with value of 20 Ohms, because that value plus the source resistance equals the 50 Ohm characteristic impedance of the transmission line. So, what happens to the propagating wave for a low to high transition?

The wave first encounters a voltage divider formed by (R_{S} + R_{T}) and the transmission line. Since R_{S} + R_{T} equals the characteristic impedance of the transmission line by design, the voltage divider will be 1/2, and so for a 2V V_{S} the magnitude of the incident wave is 1V. This wave travels down the transmission line until it hits the load, which is high impedance, and that impedance mismatch causes a reflection that travels back towards the source. Since the load is much higher impedance than the transmission line, the reflected wave will be positive with magnitude equal to the incident wave (reflection coefficient = (1M – 50) / (1M + 50) = approximately 1).

#### Reflection Coefficient at the Load:

The receiver will see the transmitted wave, which is the incident wave plus the reflected wave with no time delay between them, because the receiver is right there at the load impedance discontinuity. Since the incident wave has magnitude 1/2 * V_{S}, and the reflected wave is equal to that, the receiver sees double the magnitude of the incident wave (.5* V_{S} + .5 * V_{S} = V_{S}). And, the slew rate (change in voltage per unit time) at the receiver is double that of the incident edge rate. It sees an edge that goes to twice the voltage as the incident wave in the same amount of time.

#### Receiver sees 2x the voltage of the incident wave and 2x the edge rate

The reflected wave then travels back towards the driver. When it hits the source it sees Thevenin equivalent resistance of RS + RT, which equals the characteristic impedance of the transmission line. So, there is no reflection, and the bouncing around stops there at the source after one round trip.

#### Settling Time = One Round Trip from Driver → Receiver → Driver

This is a good situation for the receiver. It gets a nice clean edge equal to the full voltage of the source driver. But, what would a receiver connected to the midpoint shown in the diagram above observe? It would see the incident wave go by with transition from 0V to .5*VS, followed some time later by the reflected wave heading towards the source, increasing the voltage up to VS. So, it sees a stair-step right in the middle of the edge. Not good for some types of signals.

#### Source Termination: The signal only looks great at the end of the transmission line.

Synchronous signals that are sampled on the edge of a clock signal may be fine with the stair-step, because they can be sampled after the signal settling time. But, asynchronous signals such as clocks, encoders, interrupts, will have a problem, because in the logic transition zone any noise coupled in to the signal may make it go non-monotonic (dips back down) causing an unwanted logic transition. Instead of 0 -> 1, you get 0 -> 1 -> 0 -> 1. So, this is the main limitation or downside to source termination: the signal only looks great at the end of the transmission line. It is not well suited to topologies with multiple receivers.

## End Termination in Detail

Lets go through an example of end termination in detail shown in the diagram below. When VS drives a low (0V) to high (1V) transition, the wave first encounters a voltage divider formed between the source resistance and the transmission line input impedance. The transmitted voltage is 50 / (50 + 10) = 5/6.

This incident wave travels down the transmission line unperturbed until it hits the load where it sees a Thevenin equivalent impedance of 50 Ohms, which is R_{T} // R_{L}. So, there is no reflection, and the incident wave is transmitted unchanged to the receiver. There is no reflection generated at any point, so every point along the transmission line sees the same edge with same voltage and slew rate. This is great for topologies with multiple receivers.

#### End Termination: The signal looks the same at every point along the transmission line

There is no settling time with end termination. Great! So, what is the catch? Power. End termination dissipates a lot of power, and it requires a driver with more current sourcing capacity. Whenever the driver drives the line high, the end terminating resistor is conducting current to ground and dissipating power. In the case of source termination, the terminating resistor only dissipates power during a signal transition…much less power on average meaning you can use a much smaller resistor with lower power rating. In the example above, RT would dissipate (5/6)^2 / 50 = 14mW, whenever the line is driven high, and the driver needs to source 17mA, which is alot. Now, imagine driving a 32-bit data bus with 3.3V logic and with end termination: 7W! It is just not practical.

#### End Termination: High Power Dissipation

End termination is practical mainly for serial communication buses with multiple receivers (small number of data lines), especially when signalling with low-voltage swing logic families such as LVDS or Bus-LVDS (BLVDS).

## Multiple Drivers

Having multiple drivers of a transmission line is complicating, because you no have defined beginning and end points, and driving in the middle drives waves in both directions. There are two methods I can think of to deal with this topology: implement parallel termination at both ends of the transmission line, or implement source termination resistors at each driver that slow the signal edges down so much that there are no transmission line effects. You always want to do the latter, if you can get away with it. Let’s talk through both situations.

### ‘Both-Ends’ Termination

Consider a transmission line with a driver/receiver pair in the middle and with receivers at each end. A driver/receiver pair is often called a transceiver. In this case, let’s also consider a differential signal rather than a single-ended signal that is referenced to ground. In a transmission line for a differential signal, the important characteristic is the differential characteristic impedance, not the impedance of each half of the differential pair relative to ground. It is the differential impedance between them that matters.

When the driver drives out a signal transition, the wave initially sees the transmission line going to the left in parallel with the transmission line going off to the right, because the wave is going to split and propagate in both directions. So, the driver drives into 50 Ohms (100 // 100). The wave propagates in both directions down the transmission line until the ends are reached. You want to set R_{T} to equal the differential characteristic impedance of 100 Ohms, so there is no reflection. With no reflections, there is no settling time, and the receivers get nice clean edges.

Now, consider the same transmission line structure, but this time being driven from one of the ends.

When the driver drives a signal transition, the wave first sees RT in parallel with the 100 Ohm differential transmission line. Assuming RT is set to 100 Ohms, the driver drives into 50 Ohms. The wave then travels down the transmission line. At the receiver in the middle, the wave sees the high-impedance input of the receiver in parallel with the rest of the transmission line, so it sees 100 Ohms, and there is no reflection. The wave travels on past the middle receiver and hits the RT end terminator. If that terminator matches the 100 Ohms of the differential transmission line, then there is no reflection, and the end receiver gets the full incident wave.

So, Both-Ends termination works really well for high-frequency signalling with low-voltage swings where the topologies require multiple drivers and receivers. Common differential logic families using both-ends termination are RS-485, CAN and Bus-LVDS (BLVDS).

### Slowin’ it Down

The best solution to any transmission line problem is to implement a resistor at each driver that slows the edge rate down enough that the conductor no longer exhibits transmission line effects. You can’t do this if you need to drive at high frequency where edge rates must be fast, or if the conductor needs to be long, but in many cases you can do this. Slowing the edge down not only removes transmission line effects, but also reduces crosstalk and EMI, since those are proportional to signal edge rates.

In order to choose a value of resistor to slow down the edge enough, make the assumption that you will get rid of transmission line effects and calculate based on a lumped-parameter system. Consider that the source resistor and capacitance of the PCB trace and receiver pin capacitance form a low-pass filter, and make the edge rate of the step-response of that filter be slow enough such that the conductor is not more than 1/6 as long as the distance that the signal edge would occupy on that conductor. Typically, you choose a value in the range 100 Ohms – 1000 Ohms.

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